Rust

• 2026-09-20 An icosahedron on HDMI, drawn by a TxHDL core #TxHDL#FPGA#RISC-V

  tl;dr: A RISC-V core written in TxHDL draws a turning icosahedron on a monitor, with the TxHDL logo in the corner. Watch it at https://youtu.be/YbHtntvvydk. The whole thing, core, memory, video, Ethernet and a serial …

• 2026-09-12 TxHDL: a hardware description language that is a Rust library #Rust#FPGA#RISC-V

  For the past while, Dragiša Janković and I have been working on a hardware description language (HDL). Why? you ask? We were worried about the fact that the mainstream HDLs seemed too low level (hi, Verilog!) to answer …

• 2024-08-31 bazel rules for a riscv64 bare metal rust compiler #rust#bazel

  bazel rules for a riscv64 bare metal rust compiler This article assumes that you have bazel installed via the bazelisk method. This is the latest example in my repository at: https://github.com/filmil/bazel-experiments …